Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
ALVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
5.8 ns@ 5 V
Maximum Operating Temperature
+85 °C
Length
12.5mm
Maximum Operating Supply Voltage
3.6 V, 5.5 V
Width
6.1mm
Minimum Operating Supply Voltage
2.3 V, 3 V
Minimum Operating Temperature
-40 °C
Height
1.15mm
Dimensions
12.5 x 6.1 x 1.15mm
Propagation Delay Test Condition
50pF
Product details
74ALVC Family, Texas Instruments
Advanced Low-Voltage CMOS logic
Operating voltage: 1.65 to 3.6
Compatibility: Input CMOS, Output CMOS
Latch-up performance exceeds 250 mA per JESD 17
74ALVC Family
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P.O.A.
Standard
5
P.O.A.
Standard
5
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
ALVC
Logic Function
Bus Transceiver
Number of Elements per Chip
2
Number of Channels per Chip
16
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
48
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
5.8 ns@ 5 V
Maximum Operating Temperature
+85 °C
Length
12.5mm
Maximum Operating Supply Voltage
3.6 V, 5.5 V
Width
6.1mm
Minimum Operating Supply Voltage
2.3 V, 3 V
Minimum Operating Temperature
-40 °C
Height
1.15mm
Dimensions
12.5 x 6.1 x 1.15mm
Propagation Delay Test Condition
50pF
Product details
74ALVC Family, Texas Instruments
Advanced Low-Voltage CMOS logic
Operating voltage: 1.65 to 3.6
Compatibility: Input CMOS, Output CMOS
Latch-up performance exceeds 250 mA per JESD 17